Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Slew Rate Pin Number Pin Type Pin Use Reg Init State
tlac 1 1 FB2 MC2   5 I/O I RESET
segment<7> 0 0 FB2 MC3 FAST 6 I/O O  
q<4> 3 2 FB2 MC9   7 I/O/TDI (b) RESET
qdiv<2> 1 2 FB2 MC10   8 I/O (b) RESET
qdiv<1> 1 1 FB2 MC11   9 I/O (b) RESET
qdiv<0> 0 0 FB2 MC14   11 I/O (b) RESET
q<6> 3 4 FB2 MC15   12 I/O (b) RESET
catode2 3 4 FB4 MC9 FAST 18 I/O O SET
catode1 1 3 FB4 MC10 FAST 19 I/O O RESET
segment<6> 8 18 FB4 MC12 FAST 21 I/O O  
segment<5> 12 18 FB3 MC13 FAST 24 I/O O  
segment<4> 12 18 FB3 MC12 FAST 25 I/O O  
segment<3> 19 18 FB3 MC11 FAST 26 I/O O  
segment<2> 1 1 FB3 MC10 FAST 27 I/O O  
segment<1> 1 1 FB3 MC9 FAST 28 I/O O  
segment<0> 1 1 FB3 MC4 FAST 29 I/O O  
segment<0>_BUFR 8 18 FB1 MC15   33 I/O (b)  
q<7> 4 6 FB1 MC14   34 I/O (b) RESET
q<5> 4 6 FB1 MC11   36 I/O (b) RESET
carry<1> 4 7 FB1 MC10   37 I/O (b) RESET
s_a0/stop_out 4 6 FB1 MC9   38 I/O/TDO (b) RESET
q<11> 4 7 FB1 MC8   39 I/O (b) RESET
reset_s 1 2 FB1 MC2 FAST 40 I/O O  
start_s 4 6 FB1 MC1 FAST 41 I/O O RESET
segment<1>_BUFR 8 18 FB1 MC3     (b) (b)  
segment<2>_BUFR 4 18 FB1 MC4     (b) (b)  
carry<0> 4 7 FB1 MC5     (b) (b) RESET
q<1> 4 6 FB1 MC6     (b) (b) RESET
q<3> 4 6 FB1 MC7     (b) (b) RESET
q<2> 3 4 FB1 MC12     (b) (b) RESET
s_a0/current_state_FFd3 3 3 FB1 MC13     (b) (b) RESET
q<0> 3 2 FB1 MC16     (b) (b) RESET
q<10> 3 5 FB2 MC4     (b) (b) RESET
q<9> 4 7 FB2 MC5     (b) (b) RESET
carry<2> 5 8 FB2 MC6     (b) (b) RESET
q<13> 5 8 FB2 MC7     (b) (b) RESET
q<14> 4 8 FB2 MC8     (b) (b) RESET
q<15> 3 7 FB2 MC12     (b) (b) RESET
q<12> 3 4 FB2 MC13     (b) (b) RESET
q<8> 3 3 FB2 MC16     (b) (b) RESET