********** Mapped Logic ********** |
FDCPE_carry0: FDCPE port map (carry(0),carry_D(0),catode1,reset_s,'0','1');
carry_D(0) <= ((NOT start_s AND carry(0)) OR (start_s AND NOT q(0) AND NOT q(1) AND NOT q(2) AND q(3))); |
FDCPE_carry1: FDCPE port map (carry(1),carry_D(1),catode1,reset_s,'0','1');
carry_D(1) <= ((NOT carry(0) AND carry(1)) OR (carry(0) AND NOT q(4) AND NOT q(5) AND NOT q(6) AND q(7))); |
FDCPE_carry2: FDCPE port map (carry(2),carry_D(2),catode1,reset_s,'0','1');
carry_D(2) <= ((NOT carry(0) AND carry(2)) OR (NOT carry(1) AND carry(2)) OR (NOT q(8) AND carry(0) AND carry(1) AND NOT q(10) AND NOT q(9) AND q(11))); |
FTCPE_catode1: FTCPE port map (catode1,catode1_T,clkin,'0','0','1');
catode1_T <= (qdiv(0) AND qdiv(1) AND qdiv(2)); |
FDCPE_catode2: FDCPE port map (catode2,catode2_D,clkin,'0',NOT ,'1');
catode2_D <= NOT (catode1 XOR (qdiv(0) AND qdiv(1) AND qdiv(2))); |
FTCPE_q0: FTCPE port map (q(0),start_s,catode1,reset_s,'0','1'); |
FTCPE_q1: FTCPE port map (q(1),q_T(1),catode1,reset_s,'0','1');
q_T(1) <= (start_s AND q(0)) XOR (start_s AND q(0) AND NOT q(1) AND NOT q(2) AND q(3)); |
FTCPE_q2: FTCPE port map (q(2),q_T(2),catode1,reset_s,'0','1');
q_T(2) <= (start_s AND q(0) AND q(1)); |
FTCPE_q3: FTCPE port map (q(3),q_T(3),catode1,reset_s,'0','1');
q_T(3) <= ((start_s AND q(0) AND q(1) AND q(2)) OR (start_s AND q(0) AND NOT q(1) AND NOT q(2) AND q(3))); |
FTCPE_q4: FTCPE port map (q(4),carry(0),catode1,reset_s,'0','1'); |
FTCPE_q5: FTCPE port map (q(5),q_T(5),catode1,reset_s,'0','1');
q_T(5) <= (carry(0) AND q(4)) XOR (carry(0) AND q(4) AND NOT q(5) AND NOT q(6) AND q(7)); |
FTCPE_q6: FTCPE port map (q(6),q_T(6),catode1,reset_s,'0','1');
q_T(6) <= (carry(0) AND q(4) AND q(5)); |
FTCPE_q7: FTCPE port map (q(7),q_T(7),catode1,reset_s,'0','1');
q_T(7) <= ((carry(0) AND q(4) AND q(5) AND q(6)) OR (carry(0) AND q(4) AND NOT q(5) AND NOT q(6) AND q(7))); |
FTCPE_q8: FTCPE port map (q(8),q_T(8),catode1,reset_s,'0','1');
q_T(8) <= (carry(0) AND carry(1)); |
FTCPE_q9: FTCPE port map (q(9),q_T(9),catode1,reset_s,'0','1');
q_T(9) <= (q(8) AND carry(0) AND carry(1)) XOR (q(8) AND carry(0) AND carry(1) AND NOT q(10) AND NOT q(9) AND q(11)); |
FTCPE_q10: FTCPE port map (q(10),q_T(10),catode1,reset_s,'0','1');
q_T(10) <= (q(8) AND carry(0) AND carry(1) AND q(9)); |
FTCPE_q11: FTCPE port map (q(11),q_T(11),catode1,reset_s,'0','1');
q_T(11) <= ((q(8) AND carry(0) AND carry(1) AND q(10) AND q(9)) OR (q(8) AND carry(0) AND carry(1) AND NOT q(10) AND NOT q(9) AND q(11))); |
FTCPE_q12: FTCPE port map (q(12),q_T(12),catode1,reset_s,'0','1');
q_T(12) <= (carry(0) AND carry(1) AND carry(2)); |
FTCPE_q13: FTCPE port map (q(13),q_T(13),catode1,reset_s,'0','1');
q_T(13) <= ((carry(0) AND carry(1) AND q(12) AND carry(2) AND q(13)) OR (carry(0) AND carry(1) AND q(12) AND carry(2) AND NOT q(14)) OR (carry(0) AND carry(1) AND q(12) AND carry(2) AND q(15))); |
FTCPE_q14: FTCPE port map (q(14),q_T(14),catode1,reset_s,'0','1');
q_T(14) <= ((carry(0) AND carry(1) AND q(12) AND carry(2) AND q(13)) OR (carry(0) AND carry(1) AND q(12) AND carry(2) AND q(14) AND NOT q(15))); |
FTCPE_q15: FTCPE port map (q(15),q_T(15),catode1,reset_s,'0','1');
q_T(15) <= (carry(0) AND carry(1) AND q(12) AND carry(2) AND q(13) AND q(14)); |
FTCPE_qdiv0: FTCPE port map (qdiv(0),'1',clkin,'0','0','1'); |
FTCPE_qdiv1: FTCPE port map (qdiv(1),qdiv(0),clkin,'0','0','1'); |
FTCPE_qdiv2: FTCPE port map (qdiv(2),qdiv_T(2),clkin,'0','0','1');
qdiv_T(2) <= (qdiv(0) AND qdiv(1)); |
reset_s <= (NOT start_s AND NOT s_a0/stop_out); |
FDCPE_s_a0/current_state_FFd3: FDCPE port map (s_a0/current_state_FFd3,btn,catode1,ares,'0','1'); |
FTCPE_s_a0/stop_out: FTCPE port map (s_a0/stop_out,s_a0/stop_out_T,catode1,ares,'0','1');
s_a0/stop_out_T <= ((start_s AND btn AND NOT s_a0/current_state_FFd3 AND NOT s_a0/stop_out) OR (NOT start_s AND btn AND NOT s_a0/current_state_FFd3 AND s_a0/stop_out)); |
segment(0)_BUFR <= NOT (((catode1 AND q(8) AND NOT q(10) AND NOT q(9) AND NOT q(11) AND tlac)
OR (catode1 AND NOT q(8) AND q(10) AND NOT q(9) AND NOT q(11) AND tlac) OR (catode1 AND q(0) AND NOT q(1) AND NOT q(2) AND NOT q(3) AND NOT tlac) OR (catode1 AND NOT q(0) AND NOT q(1) AND q(2) AND NOT q(3) AND NOT tlac) OR (NOT catode1 AND q(4) AND NOT q(5) AND NOT q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND NOT q(4) AND NOT q(5) AND q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND tlac AND q(12) AND NOT q(13) AND NOT q(14) AND NOT q(15)) OR (NOT catode1 AND tlac AND NOT q(12) AND NOT q(13) AND q(14) AND NOT q(15)))); |
segment(0) <= segment(0)_BUFR; |
segment(1)_BUFR <= NOT (((catode1 AND q(8) AND q(10) AND NOT q(9) AND NOT q(11) AND tlac)
OR (catode1 AND NOT q(8) AND q(10) AND q(9) AND NOT q(11) AND tlac) OR (catode1 AND q(0) AND NOT q(1) AND q(2) AND NOT q(3) AND NOT tlac) OR (catode1 AND NOT q(0) AND q(1) AND q(2) AND NOT q(3) AND NOT tlac) OR (NOT catode1 AND q(4) AND NOT q(5) AND q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND NOT q(4) AND q(5) AND q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND tlac AND q(12) AND NOT q(13) AND q(14) AND NOT q(15)) OR (NOT catode1 AND tlac AND NOT q(12) AND q(13) AND q(14) AND NOT q(15)))); |
segment(1) <= segment(1)_BUFR; |
segment(2)_BUFR <= NOT (((catode1 AND NOT q(8) AND NOT q(10) AND q(9) AND NOT q(11) AND tlac)
OR (catode1 AND NOT q(0) AND q(1) AND NOT q(2) AND NOT q(3) AND NOT tlac) OR (NOT catode1 AND NOT q(4) AND q(5) AND NOT q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND tlac AND NOT q(12) AND q(13) AND NOT q(14) AND NOT q(15)))); |
segment(2) <= segment(2)_BUFR; |
segment(3) <= NOT ((catode1 AND q(10) AND tlac)
XOR ((catode1 AND q(1) AND q(3) AND NOT tlac) OR (catode1 AND q(2) AND q(3) AND NOT tlac) OR (NOT catode1 AND q(5) AND q(7) AND NOT tlac) OR (NOT catode1 AND q(6) AND q(7) AND NOT tlac) OR (NOT catode1 AND tlac AND q(13) AND q(15)) OR (NOT catode1 AND tlac AND q(14) AND q(15)) OR (catode1 AND q(8) AND NOT q(9) AND NOT q(11) AND tlac) OR (catode1 AND q(0) AND q(1) AND q(2) AND NOT tlac) OR (catode1 AND NOT q(0) AND NOT q(1) AND q(2) AND NOT tlac) OR (catode1 AND NOT q(10) AND q(9) AND q(11) AND tlac) OR (NOT catode1 AND q(4) AND q(5) AND q(6) AND NOT tlac) OR (NOT catode1 AND NOT q(4) AND NOT q(5) AND q(6) AND NOT tlac) OR (NOT catode1 AND tlac AND q(12) AND q(13) AND q(14)) OR (NOT catode1 AND tlac AND NOT q(12) AND NOT q(13) AND q(14)) OR (catode1 AND NOT q(8) AND q(10) AND q(9) AND NOT q(11) AND tlac) OR (catode1 AND q(0) AND NOT q(1) AND NOT q(2) AND NOT q(3) AND NOT tlac) OR (NOT catode1 AND q(4) AND NOT q(5) AND NOT q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND tlac AND q(12) AND NOT q(13) AND NOT q(14) AND NOT q(15)))); |
segment(4) <= NOT (((catode1 AND q(8) AND NOT q(11) AND tlac)
OR (catode1 AND q(0) AND NOT q(3) AND NOT tlac) OR (NOT catode1 AND q(4) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND tlac AND q(12) AND NOT q(15)) OR (catode1 AND q(8) AND NOT q(10) AND NOT q(9) AND tlac) OR (catode1 AND q(0) AND NOT q(1) AND NOT q(2) AND NOT tlac) OR (catode1 AND NOT q(1) AND q(2) AND NOT q(3) AND NOT tlac) OR (catode1 AND q(10) AND NOT q(9) AND NOT q(11) AND tlac) OR (NOT catode1 AND q(4) AND NOT q(5) AND NOT q(6) AND NOT tlac) OR (NOT catode1 AND NOT q(5) AND q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND tlac AND q(12) AND NOT q(13) AND NOT q(14)) OR (NOT catode1 AND tlac AND NOT q(13) AND q(14) AND NOT q(15)))); |
segment(5) <= NOT (((catode1 AND q(8) AND NOT q(10) AND NOT q(11) AND tlac)
OR (catode1 AND q(8) AND q(9) AND NOT q(11) AND tlac) OR (catode1 AND q(0) AND q(1) AND NOT q(3) AND NOT tlac) OR (catode1 AND q(0) AND NOT q(2) AND NOT q(3) AND NOT tlac) OR (catode1 AND q(1) AND NOT q(2) AND NOT q(3) AND NOT tlac) OR (catode1 AND NOT q(10) AND q(9) AND NOT q(11) AND tlac) OR (NOT catode1 AND q(4) AND q(5) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND q(4) AND NOT q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND q(5) AND NOT q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND tlac AND q(12) AND q(13) AND NOT q(15)) OR (NOT catode1 AND tlac AND q(12) AND NOT q(14) AND NOT q(15)) OR (NOT catode1 AND tlac AND q(13) AND NOT q(14) AND NOT q(15)))); |
segment(6) <= NOT (((catode1 AND NOT q(1) AND NOT q(2) AND NOT q(3) AND NOT tlac)
OR (catode1 AND NOT q(10) AND NOT q(9) AND NOT q(11) AND tlac) OR (NOT catode1 AND NOT q(5) AND NOT q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND tlac AND NOT q(13) AND NOT q(14) AND NOT q(15)) OR (catode1 AND q(8) AND q(10) AND q(9) AND NOT q(11) AND tlac) OR (catode1 AND q(0) AND q(1) AND q(2) AND NOT q(3) AND NOT tlac) OR (NOT catode1 AND q(4) AND q(5) AND q(6) AND NOT q(7) AND NOT tlac) OR (NOT catode1 AND tlac AND q(12) AND q(13) AND q(14) AND NOT q(15)))); |
segment(7) <= '0'; |
FTCPE_start_s: FTCPE port map (start_s,start_s_T,catode1,ares,'0','1');
start_s_T <= ((start_s AND btn AND NOT s_a0/current_state_FFd3) OR (btn AND NOT s_a0/current_state_FFd3 AND NOT s_a0/stop_out)); |
FTCPE_tlac: FTCPE port map (tlac,'1',btnsel,'0','0','1'); |
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); LDCP (Q,D,G,CLR,PRE); |